The Big Processor Guide - Terminology

This page describes some of the vocabulary used in this guide. Particularly, it is meant to address some of the technologies and standards that are mentioned often in the guide.


3DNow! was AMD's first set of SIMD instructions added to the x86 architecture. Where Intel's MMX had targeted multimedia applications in general, 3DNow! was specifically marketed toward the nascent gaming market. Unfortunately, it met with limited success. It did inspire Intel to produce the much more successful SSE instructions.


When AMD launched its K8 processor family, it included support for this set of 64-bit extensions to the 32-bit x86 architecture. In so doing, they created a set of processors capable of running 64-bit code without breaking compatibility with older 32-bit code. AMD has always refered to the set as "x86-64", but the trade press has largely come to call it "AMD64" for brevity, clarity, and to indicate who originated it. Intel was eventually compelled to concoct a duplicate set of instructions different in name but fully compatible, which they refer to as EM64T.


An architecture, in the context of computer processors, defines the way a processor interfaces with the system. The focus of this guide is on processors in the x86 architecture, because that is what most people use. It is important to note that the architecture does not in any way specify the inner workings of the processor, only the inputs it must accept and the outputs it must then provide. Compare with microarchitecture.


A rebranding of PowerNow! sold on desktop processors, Cool'n'Quiet reduces processor voltage and clock speed under light load to reduce power use and therefore heat generated.


Double-pumping is a technique for increasing a bus's performance without increasing its clock speed. It may be used to accelerate the Front Side Bus. Normally, synchronous digital systems "trigger" on either the rising or the falling edge of a clock signal: that is, when it changes from a value of "0" to "1" (or vice versa), they start their next action. Double-pumped buses trigger on both the rising and the falling edge. This allows for faster operation without dealing with the problems (increased interference, slew rates, etc.) associated with increasing the clock signal's frequency.

Front Side Bus

The Front Side Bus (FSB) is the link a processor uses to communicate with the rest of the motherboard. In "traditional" configurations, the FSB connects the processor and Northbridge.


Originally Jackson Hyper-Threading, because its internal codename was Jackson. Hyper-Threading is a particular implementation of Symmetric MultiProcessing, a way of allowing one processor to behave much as if it were two. It is therefore able to handle two threads simultaneously. In some cases this offers real performance improvements; in others the competition between threads chokes available bandwidth.


Microarchitecture describes the particular implementation of a processor; the way it works internally. Microarchitectures are generally reused with modifications in several iterations because designing one is expensive, slow, and difficult. Compare with architecture.


The Multi-Media eXtensions, MMX was a set of SIMD extensions to the x86 architecture that Intel first implemented in the Pentium with MMX Technology (or more commonly, "Pentium MMX") and included on just about everything since. Intended to accelerate multimedia applications like video, MMX proved to be of questionable real-world value in the long run.

No Execute Bit/NX Bit/XD Bit

This is a security feature AMD introduced with the x86-64 extensions. It is a bit that can be sent to the processor to order it not to execute a command. This is meant to be employed to prevent buffer overflow attacks. AMD refers to it as NX (No eXecute), Intel refers to it as XD (eXecute Disable).


The Jack of All Trades. The Northbridge is a go-between, linking the processor to other hardware: the PCI bus, hard drives, and traditionally memory. The Northbridge is among the most critical components of a modern motherboard. It is connected directly to the Southbridge.


AMD's power-regulation system, capable of reducing processor clock speed and voltage to reduce power use. Intended for laptops, it would eventually find its way into essentially the entire K8 family. Also marketed as Cool'n'Quiet in desktop chips and Optimized Power Management (OPM) in Opterons.


Similar to double-pumping, but doubled again. Trigger on rising edge, falling edge, peak, and trough.


See here.


Single Instruction, Multiple Data: in the context of consumer CPUs, SIMD instructions are a class of instructions that tell a processor to execute operations on several pieces of data. This can replace multiple separate instructions and can be more efficient. MMX was the first set of SIMD instructions added to the x86 architecture.


The Jester. The Southbridge is like the Northbridge's assistant; it typically deals with less-critical components and functions. It may provide for extra input/output hookups, or integrated sound, or any number of other things.


Intel created SpeedStep as a way to extend the battery life of laptops, and also help them stay cool. SpeedStep can reduce the operating voltage and clock frequency of the processor to reduce power draw/heat output. Originally it could drop the clock frequency to only one lower setting; SpeedStep II raise this to two. SpeedStep III added another, deeper "sleep" state, amongst some other changes. The later versions would sometimes be refered to as Enhanced Intel SpeedStep Technology (EIST) by Intel, though most outsiders found the name too cumbersome.


Streaming SIMD Extensions: A follow-up to MMX (and a shot back at 3DNow!), the SSE extensions are a set of SIMD instructions that Intel debuted with the Pentium III (for this reason, they originally bore the codename Katmai New Instructions). Later revisions known as SSE2 (seen in the first Pentium 4, Willamette) and SSE3 (codenamed Prescott New Instructions) debuted in the Pentium 4 series. SSSE3 (Supplemental SSE3), a revision of SSE3, sometimes refered to as SSE4 (though not by Intel) debuted as part of all Intel Core Microarchitecture chips. To remove ambiguity, the original instruction set is sometimes refered to as SSE1.


Vanderpool is Intel's codename for its virtualization technology. After release, they rechristened it Virtualization Technology (VT). Virtualization is a way of abstrating the hardware layer; in essence, making software less sensitive to the platform it is being run on.

x86 (and related terms)

x86 describes all processors built within the "x86 architecture": a set of instructions originating with Intel's 8086. The generation of processors following the 486 have often been dubbed the "586" class. This is in keeping with the older naming tradition, which progressed as: 8086, 80186, 286, 386, 486. The term has been extended to apply to subsequent generations: Intel's Pentium 4 is considered a 786 processor by some. The blanket term x86 is used to refer to all processors in the lineage).

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