Timeline of x86 Instruction Set Extensions

Every so often, the major x86 processor makers decide to add new instructions to the already-large x86 instruction set. The goal is simple: improve performance. The implementation is not. These instructions have to be defined rigorously, implemented at the hardware level, and even then they don't actually do anything until independent software developers decide to take advantage of them. And as you will see, sometimes making sense of it all is not simple for end users.

A timeline showing the relationships between different microarchitectures

(Click for big version)

Some of these are relatively well known; some are not.

One of the sticking points over the next few years will most likely be the growing variety of SSE versions. You may note that AMD has begun introducing their own SSE variants, which Intel seems hesitant to adopt. SSE5, in particular, is quite large (it incorporates all previous AMD-supported SSE versions, and adds more new instructions than were in the original 386 instruction set), and its future is unclear. It very well may repeat 3DNow!'s history, failing to catch on and then fading from view.

Intel, for its part, is also introducing new SSE versions. And AMD has suggested that they may not implement either SSE4.1 (which Intel has already implemented) or SSE4.2 (which will be in future Intel products) for some time. The future of SSE is now very unclear.

Similarly,

A huge version (10,000 x 5,571 px, 1.4 MB) of this image is also available. Other sizes available on request.

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